A resistive memory array can be utilized to perform analog computations that exploit the fundamental relationship between row voltage and column current in a resistive mesh to realize an analog multiply-accumulate unit. Such a unit is not only faster than a pure digital computation, but also consumes significantly lower energy than traditional digital functional units. The memory array is typically organized as a grid of cells interconnected by horizontal and vertical wires, referred to as word lines and bit lines. While it is known that accessing the memory cells involves activating a row followed by reading or writing to bit lines, the effect of row activation signal on bit line voltage/current can also be interpreted as a bitwise AND operation between row signal and cell value. With emerging resistive memories, the above concept can be further developed to build a powerful multiply-accumulate unit within the memory. For instance, the fundamental relationship between a row access voltage and the resulting bit line current can act as an analog multiplier of row voltage and cell conductance. Instead of accessing a single row as performed for loading and storing data, multiple rows can be activated concurrently.